Get CPU Instruction Sets using cpu_features Library and C++

Detecting CPU instruction sets is an important task in modern software development. Some CPU instruction sets are required to take full advantage of modern hardware, while others may not be available on older CPUs. To detect which instruction sets are available on a given CPU, we can use the cpu_features library developed by Google. This tutorial shows how to use cpu_features library for getting CPU instruction sets using C++.

In the following code, we use the GetX86Info function which returns an object of type X86Info, which contains information about the current processor's architecture and features. The features member of this object represents the processor's supported instruction sets.

The code defines a map object that maps instruction set names to their corresponding boolean values. We loop through the map and print out the name of each instruction set along with a Yes or No depending on whether the instruction set is supported by the processor or not.

#include <cpuinfo_x86.h>
#include <iostream>
#include <map>

int main()
{
    static const cpu_features::X86Features features = cpu_features::GetX86Info().features;

    std::map<std::string, int> map = {
        {"1. SSE", features.sse},
        {"2. SSE2", features.sse2},
        {"3. SSE3", features.sse3},
        {"4. SSSE3", features.ssse3},
        {"5. SSE4.1", features.sse4_1},
        {"6. SSE4.2", features.sse4_2},
        {"7. AVX", features.avx},
        {"8. AVX2", features.avx2},
        {"9a. AVX-512F", features.avx512f},
        {"9b. AVX-512CD", features.avx512cd},
        {"9c. AVX-512ER", features.avx512er},
        {"9d. AVX-512PF", features.avx512pf},
        {"9e. AVX-512VL", features.avx512vl},
        {"9f. AVX-512DQ", features.avx512dq},
        {"9g. AVX-512BW", features.avx512bw},
        {"9h. AVX-512IFMA", features.avx512ifma},
        {"9i. AVX-512VBMI", features.avx512vbmi},
        {"9j. AVX-512 4VNNIW", features.avx512_4vnniw},
        {"9k. AVX-512 4FMAPS", features.avx512_4fmaps},
        {"9l. AVX-512VPOPCNTDQ", features.avx512vpopcntdq},
        {"9m. AVX-512VNNI", features.avx512vnni},
        {"9n. AVX-512VBMI2", features.avx512vbmi2},
        {"9o. AVX-512BITALG", features.avx512bitalg},
        {"9p. AVX-512 VP2INTERSECT", features.avx512_vp2intersect},
    };

    auto it = map.begin();
    while (it != map.end()) {
        std::cout << it->first << (it->second ? " Yes" : " No") << std::endl;
        ++it;
    }

    return 0;
}

The output of the code will depend on the CPU that it is run on. Here's an example output:

1. SSE Yes
2. SSE2 Yes
3. SSE3 Yes
4. SSSE3 Yes
5. SSE4.1 Yes
6. SSE4.2 Yes
7. AVX Yes
8. AVX2 Yes
9a. AVX-512F Yes
9b. AVX-512CD Yes
9c. AVX-512ER No
9d. AVX-512PF No
9e. AVX-512VL Yes
9f. AVX-512DQ Yes
9g. AVX-512BW Yes
9h. AVX-512IFMA Yes
9i. AVX-512VBMI Yes
9j. AVX-512 4VNNIW No
9k. AVX-512 4FMAPS No
9l. AVX-512VPOPCNTDQ Yes
9m. AVX-512VNNI Yes
9n. AVX-512VBMI2 Yes
9o. AVX-512BITALG Yes
9p. AVX-512 VP2INTERSECT Yes